1. Field of the Invention
The present invention relates to communications systems in general and more particularly to devices for attaching devices, such as computers, terminals, I/O devices, etc. to said communications system.
2. Prior Art
The prior art utilizes several different types of communication highways for interconnecting nodes or stations. Each node is adapted to carry one or more data terminal equipment. The data terminal equipment communicates with other data terminal equipment via the medium which forms the communications highway.
The serial loop data communications system is a well known prior art communications highway. The basic serial loop data communications system consists of a length of communication media formed into a loop. The medium may be electrically conductive wires, coax cable fiber optics, conductors, etc. The two extremities of the communication media are connected to a central station which provides supervisory functions for the loop. Other stations which may include computers, terminal devices, etc. are serially connected to the loop. The system configuration is such that a sequence of electrical signals called a message originating at any station on the loop is available on a sequential basis to each active station on the loop. For example, a message originating at the supervisory station is available to the first active station on the loop. The message is next available to the second active station on the loop and so on until it is returned to the supervisory station.
The prior art has also disclosed several different techniques for controlling the loop communications system. U.S. Pat. Nos. 3,752,932 and 4,293,948 describe examples of such prior art control techniques. The patents seem to cover the techniques and procedures under which a station is allowed to dispatch and/or receive messages from the loop.
A necessary element in a loop communications system is the interface circuit arrangement which interconnects a data terminal equipment to the communication medium. The prior art abounds with different types of interface circuit arrangements. One of such circuit arrangements is disclosed in U.S. Pat. No. 4,424,565. In the patent the interface circuit connects a processor to a communication channel. The circuit is programmable and serves to dynamically translate the header portion of a data message on the channel, as it is received and thereby determine whether this data message is to be stored in the processor memory. If the message is to be stored, the interface circuit immediately converts the header field into a hardware address which is used to activate a specific location in the processor memory.
Still other types of communications adapters are disclosed in IBM Technical Disclosure Bulletin, Vol. 22, No. 8A, January 1980 (page 3059) and Vol. 13, No. 5, October 1970 (page 1151). These adapters are geared primarily to produce functions based upon the idiosyncrasies of the DTE and/or the protocol (set of rules used to control data movement on the loop) of the communications system.